Spin also allows avoiding significant memory segmentation issues that must be considered for assembly code.
Parallax Propeller Serial Port Software Engineer JeffThe Spin programming language and Propeller Tool integrated development environment (IDE) were designed by Chip Gracey and Parallaxs software engineer Jeff Martin.Self-modifying code is possible and is used internally, for example, as the boot loader overwrites itself with the Spin Interpreter.
Subroutines in Spin (object-based high-level code) use a call-return mechanism requiring use of a call stack. Access to shared memory (32 KB random-access memory (RAM); 32 KB read-only memory (ROM)) is controlled via round-robin scheduling by an internal computer bus controller termed the hub. Parallax Propeller Serial Port Generator For UseEach cog also has access to two dedicated hardware counters and a special video generator for use in generating timing signals for Phase Alternating Line ( PAL ), National Television System Committee ( NTSC ), Video Graphics Array (VGA), servomechanism -control, and others. Only the external oscillator may be run through an on-chip phase-locked loop (PLL) clock multiplier, which may be set at 1x, 2x, 4x, 8x, or 16x. If used correctly, this can improve power efficiency; for example, the PLL multiplier can be decreased before a long no operation wait needed for timing purposes, then increased afterward, causing the processor to use less power. However, the utility of this technique is limited to situations where no other cog is executing timing-dependent code (or is carefully designed to cope with the change), since the effective clock rate is common to all cogs. When running at 80 MHz, the proprietary interpreted Spin programming language executes approximately 80,000 instruction-tokens per second on each core, giving 8 times 80,000 for 640,000 high-level instructions per second. Most machine-language instructions take 4 clock-cycles to execute, resulting in 20 million instructions per second (MIPS) per cog, or 160 MIPS total for an 8-cog Propeller. ![]() Some protection is available for situations where one core attempts to use a pin as an output while another attempts to use it as an input; this is explained in Parallaxs technical reference manual. Parallax thus makes sample code available which can generate video signals (text and somewhat low-resolution graphics) using a minimum parts count consisting of the Propeller, a crystal oscillator, and a few resistors to form a crude digital-to-analog converter (DAC). The frequency of the oscillator is important, as the correction ability of the video timing hardware is limited to the clock rate. It is possible to use multiple cogs in parallel to generate a single video signal. More generally, the timing hardware can be used to implement various pulse-width modulation (PWM) timing signals. The Propeller is a 32-bit processor, however, and these tables may have insufficient accuracy for higher-precision uses. After booting the propeller, a bytecode interpreter is copied from the built in ROM into the 2 KB RAM of the primary COG. This COG will then start interpreting the bytecodes in the main 32 KB RAM. More than one copy of the bytecode interpreter can run in other COGs, so several Spin code threads can run simultaneously. Within a Spin code program, assembly code program(s) can be inline inserted. This interpreter decodes strings of instructions, one instruction per byte, from user code which has been edited, compiled, and loaded onto the Propeller from within a purpose-specific integrated development environment (IDE). This IDE, which Parallax names The Propeller tool, is intended for use under a Microsoft Windows operating system. Because it is interpreted in software, it runs slower than pure Propeller assembly, but can be more space-efficient: Propeller assembly opcodes are 32 bits long; Spin directives are 8 bits long, which may be followed by a number of 8-bit bytes to specify how that directive operates.
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